1. Field of the Invention
The present invention relates to non-volatile semiconductor memory devices, and more particularly, to an improvement of a mask ROM (Read Only Memory) device and a method of manufacturing thereof.
2. Description of the Background Art
In a mask ROM device, user's data is written in its memory device using a mask in the manufacturing process. In writing of data in the mask ROM device, either a depletion type FET (Field-Effect Transistor) or an enhancement type FET is generally formed depending on data to be written. Selection between a depletion type FET and an enhancement type FET is generally carried out by changing a threshold voltage Vth of an FET by ion implantation.
In the depletion type FET, drain current flows even if the gate voltage is 0 V. On the other hand, in the enhancement type FET, drain current does not flow if the gate voltage is 0 V. Therefore, it is possible to write user's data in a mask ROM device by forming a depletion type FET and an enhancement type FET when data to be written is "0" and "1", respectively.
FIG. 9 shows an equivalent circuit diagram of an NAND type memory device as one example of a conventional mask ROM device. The mask ROM device includes bit lines 901 to 903, word lines 911 to 913, enhancement type transistors QE1 to QE5, and depletion type transistors QD1 to QD4. In order to read out information of "0" or "1" stored in a selected memory cell, a voltage of, for example, 0 V which brings the enhancement type FET to an off state is supplied only to a word line connected to the selected memory cell, and a voltage VG which brings the enhancement type FET to an on state is supplied to the remaining two word lines.
When information stored in transistor QE3 connected to bit line 902 is read out, for example, word line 911 is selected, to which 0V is applied. At this time, since transistor QE3 is an enhancement type FET, transistor QE3 is not brought to an on state. On the other hand, since the voltage VG is applied to non-selected word lines 912 and 913, transistors QD2 and QD3 are in an on state. As a result, since transistor QE3 is in an off state, current does not flow in a series circuit including transistors QE3, QD2 and QD3. Information "1" stored in transistor QE3 is read out through bit line 902.
Similarly, when information stored in transistor QD3 connected to bit line 902 is read out, word line 913 is selected, to which 0 V is applied. At this time, since transistor QD3 is a depletion type FET, transistor QD3 is in an on state even if the voltage applied to word line 913 is 0 V. On the other hand, since the voltage VG is applied to non-selected word lines 911 and 912, both transistors QE3 and QD2 are in an on state. As a result, current flows in a series circuit including transistors QE3, QD2 and QD3, and information "0" stored in transistor DQ3 is read out through bit line 902.
FIG. 10 is a plan view showing one example in which the mask ROM device shown in the equivalent circuit diagram of FIG. 9 is implemented on a silicon substrate. Corresponding to the equivalent circuit diagram of FIG. 9, a mask ROM device of FIG. 10 includes bit lines 901 to 903 and word lines 911 to 913. A square region 1020 shown by a dashed line indicates a region where ions are implanted for a depletion type FET.
FIG. 11 is a sectional view taken along the line 11--11 in FIG. 10. In this sectional view, N.sup.+ doped regions 1102 serving as source/drain regions are formed in a surface layer of a P type silicon substrate 1103. Impurity region 1020 for a depletion type FET is formed including a channel region between the source/drain regions. Word lines 911 to 913 are formed on the channel regions with a thin gate insulation film interposed therebetween. Source/drain regions 1102 and word lines 911 to 913 are covered with an insulating layer 1101. It should be noted that impurity regions 1020 for a depletion type FET are generally formed with an ion implantation method using a resist mask or the like before word lines 911 to 913 are formed.
More specifically, in the conventional mask ROM device as described above, data to be stored must be written by forming impurity region 1020 for a depletion type FET at a relatively initial stage of the manufacturing process before formation of a gate electrode. Therefore, a period from reception of data to be stored from the user to delivery of a mask ROM device having the data written therein (hereinafter referred to as a "turnaround time") is long.